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(parent: 090f4b6) | patch
drm/radeon/si: properly set up the clearstate buffer for pg (v2)
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 13 Aug 2013 16:48:06 +0000 (12:48 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Aug 2013 20:30:53 +0000 (16:30 -0400)
commit59a82d0e65539812652dffea160ef483c1d310f5
tree69d81a30e2375cd3abf3e43863cc0941541400f0tree | snapshot
parent090f4b6ad38eec0c24dcdc9d01cc22077c3b9d22commit | diff
drm/radeon/si: properly set up the clearstate buffer for pg (v2)

The format of the clearstate buffer used for pg (powergating)
changed between NI and SI.  This formats it properly for what
the hardware expects on SI.

v2: fix addresses

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/evergreen.c diff | blob | history
drivers/gpu/drm/radeon/si.c diff | blob | history
Beck SC1x5 Kernel