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ENGR00209657 MX6SL-Initialise CPU_CLK and AHB_CLK to default rates.
authorRanjani Vaidyanathan <ra5478@freescale.com>
Thu, 17 May 2012 04:41:47 +0000 (23:41 -0500)
committerLothar Waßmann <LW@KARO-electronics.de>
Fri, 24 May 2013 06:34:39 +0000 (08:34 +0200)
commit6b15b069217b81eaf114bdccd3db345e8fac8de5
tree50b7377551f54d40adb97a789627ab7900f9f9b7tree | snapshot
parentd2b2cb31d5d03ac995ac3615f5c4ff2c1e948cd0commit | diff
ENGR00209657 MX6SL-Initialise CPU_CLK and AHB_CLK to default rates.

Set CPU_CLK to be 1GHz at boot and ABH_CLK to be 132MHz.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
arch/arm/mach-mx6/board-mx6sl_arm2.c diff | blob | history
arch/arm/mach-mx6/clock_mx6sl.c diff | blob | history
Linux kernel for KaRo TX COM modules