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(parent: 6500fc0) | patch
drm/radeon: enable mgcg on CIK
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 14 Aug 2013 22:58:43 +0000 (18:58 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Aug 2013 20:30:58 +0000 (16:30 -0400)
commit773dc10a8acd28c19947b557094d4c1ec0043998
tree9feaf191907840e48eb5463bc6b75d19c637a488tree | snapshot
parent6500fc0c9fd9a0c3cde1b498541a259d1ba078bacommit | diff
drm/radeon: enable mgcg on CIK

Now that the CP is no longer reset and cg is properly
disabled in when appropriate in the dpm code we can
now enable mgcg (medium grained clockgating).

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/radeon_asic.c diff | blob | history
Beck SC1x5 Kernel