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(parent: bc833fd) | patch
ENGR00220818 [MX6SL] - Ensure the Enable bit is set for all the PLLs.
authorRanjani Vaidyanathan <ra5478@freescale.com>
Mon, 20 Aug 2012 18:35:07 +0000 (13:35 -0500)
committerLothar Waßmann <LW@KARO-electronics.de>
Fri, 24 May 2013 06:35:16 +0000 (08:35 +0200)
commit7d4f3a1ce66f75012585cde4c0f72e3945f462e5
treec94603335df8479d75717215888fb7087c5953cctree | snapshot
parentbc833fdb7b50008b8c2449e24977a6b58b45c216commit | diff
ENGR00220818 [MX6SL] - Ensure the Enable bit is set for all the PLLs.

The ENABLE bit is not set for all PLLs by default. Ensure
that the pll_enable() function sets this bit for all PLLs.
The pll_disable() function should not clear this bit
for PLL1, PLL2, PLL3 and PLL7. The output of these PLLs
maybe used even if they are bypassed.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
arch/arm/mach-mx6/clock_mx6sl.c diff | blob | history
Linux kernel for KaRo TX COM modules