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(parent: 60f975b) | patch
ARM: tegra: fix pclk rate
authorStephen Warren <swarren@nvidia.com>
Fri, 20 Apr 2012 22:58:18 +0000 (16:58 -0600)
committerStephen Warren <swarren@nvidia.com>
Wed, 25 Apr 2012 21:22:09 +0000 (15:22 -0600)
commit7ff4db0967bd7d617c77dc5a66c0d95166277817
tree43328bab20e3fe0e2c0a613b5860eabd4802342ftree | snapshot
parent60f975b98cf41476ba0e156f7523b197b046cf2bcommit | diff
ARM: tegra: fix pclk rate

Commit 40f9cf0 "ARM: tegra: reparent sclk to pll_c_out1" changed the
rate of hclk. Since pclk is derived from that, and only has integer
dividers, the pclk rate needs to change in the same fashion, from 54MHz
to 60MHz.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/mach-tegra/common.c diff | blob | history
Beck SC1x5 Kernel