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(parent: f7335a9) | patch
clk: tegra: add ac97 controller clock
authorLucas Stach <dev@lynxeye.de>
Mon, 6 May 2013 21:11:11 +0000 (15:11 -0600)
committerOlof Johansson <olof@lixom.net>
Thu, 9 May 2013 23:53:05 +0000 (16:53 -0700)
commit90d1c696bc8620169dd0eed678f72c0e825022ad
tree20e1d28d1f3fc00b548c988a2fc0191524364c62tree | snapshot
parentf7335a9576b5404c76f3edea671b308fd806a605commit | diff
clk: tegra: add ac97 controller clock

AC97 controller clock is hardwired to pll_a_out0.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
drivers/clk/tegra/clk-tegra20.c diff | blob | history
Linux kernel for KaRo TX COM modules