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(parent: a3c477b) | patch
drm: rcar-du: Fix display timing controller parameter
authorKoji Matsuoka <koji.matsuoka.xm@renesas.com>
Mon, 18 Apr 2016 07:31:30 +0000 (16:31 +0900)
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Mon, 14 Nov 2016 23:44:50 +0000 (01:44 +0200)
commit9cdced8a39c04cf798ddb2a27cb5952f7d39f633
treee00c8f9060a77501295b6c6ba8de5a1c96d5e84ftree | snapshot
parenta3c477b33d6cf015fed50fe5ee23f57e2d579ef4commit | diff
drm: rcar-du: Fix display timing controller parameter

There is a bug in the setting of the DES (Display Enable Signal)
register. This current setting occurs 1 dot left shift. The DES
register should be set minus one value about the specifying value
with H/W specification. This patch corrects it.

Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
drivers/gpu/drm/rcar-du/rcar_du_crtc.c diff | blob | history
Beck SC1x5 Kernel