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(parent: 48404c1) | patch
drm/i915: fix i915_frequency_info on BDW
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Fri, 1 Aug 2014 21:14:48 +0000 (18:14 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 3 Sep 2014 08:54:14 +0000 (10:54 +0200)
commit9dd3c605a395c27afeadbb95cf73cdb35e99e135
tree4b5357708de99ffacf7f36b96288e0b368113d23tree | snapshot
parent48404c1e53d4e15d7e3e77cd2c8f3f22973ef38ecommit | diff
drm/i915: fix i915_frequency_info on BDW

The GEN6_PM* registers don't exist on BDW anymore, so when we read
this file we trigger unclaimed register errors. The equivalent BDW
register for PMs is GEN8_GT_I*R(2), so use it.

Testcase: igt/pm_rpm/debugfs-read
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c diff | blob | history
Beck SC1x5 Kernel