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(parent: 9311321) | patch
ARM: tegra: reparent sclk to pll_c_out1
authorStephen Warren <swarren@nvidia.com>
Thu, 12 Apr 2012 20:09:39 +0000 (14:09 -0600)
committerStephen Warren <swarren@nvidia.com>
Mon, 16 Apr 2012 17:00:20 +0000 (11:00 -0600)
commita064b5c7cbd98acedf5239d55e9ed30f463c42f5
tree5468172dea7c67df21cd3db8289f7efca54a0ed2tree | snapshot
parent9311321fa378134f96149a72c89cd740113ffe54commit | diff
ARM: tegra: reparent sclk to pll_c_out1

pll_p_out4 needs to be used for other purposes. Reparent sclk so that
it runs from pll_c. Change sclk's rate to 120MHz from 108MHz since this
is the lowest precise rate that can be achieved by dividing the pll_c
rate without reducing the sclk rate. (600/5=120, 600/5.5=109.0909...,
600/6=100).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/mach-tegra/common.c diff | blob | history
Linux kernel for KaRo TX COM modules