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(parent: 6ce0f5c) | patch
clk: samsung: exynos7: Correct CMU_FSYS0 clocks names
authorAlim Akhtar <alim.akhtar@samsung.com>
Thu, 10 Sep 2015 08:44:34 +0000 (14:14 +0530)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Tue, 15 Sep 2015 09:16:09 +0000 (11:16 +0200)
commita259a61be1d0d01aa2dd4778722e4d161780c813
treecf30590cb9eb7c06a3b3ae56717e9ae2be6b0fdetree | snapshot
parent6ce0f5cf11a1165675a1eef8a17b8738fea3f9dacommit | diff
clk: samsung: exynos7: Correct CMU_FSYS0 clocks names

This patch renames CMU_FSYS0 clocks names to match with user manual.
And also adds missing gate clock for aclk_fsys0_200.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
drivers/clk/samsung/clk-exynos7.c diff | blob | history
include/dt-bindings/clock/exynos7-clk.h diff | blob | history
Beck SC1x5 Kernel