ENGR00171079-7 mx6q clock anaclk input source clock

ENGR00171079-7 mx6q clock anaclk input source clock

* Add mx6q anaclk_1/2 clock input source clock support
* anaclk can be bypassed to pll4_audio.
* _clk_audio_video_set_parent allows to bypass anaclk input
  clock source, for sabreauto platform anaclk_2 is the clock
  source for cs42888 and this clock needs to be bypassed to
  esai to supply the same master clk signal.

Signed-off-by: Adrian Alonso <aalonso@freescale.com>