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(parent: 07f098e) | patch
[SCSI] mvsas: change SL mode0 register value
authorXiangliang Yu <yuxiangl@marvell.com>
Thu, 29 Sep 2011 07:34:32 +0000 (00:34 -0700)
committerJames Bottomley <JBottomley@Parallels.com>
Sun, 2 Oct 2011 18:15:04 +0000 (13:15 -0500)
commitaa117dd14372e1b0bed651af2db1be670b595032
treeb1156f20fdf22c9ac5bac962227d067dd87179b4tree | snapshot
parent07f098e6f4a9a488605d6a3a13ce2805023a0384commit | diff
[SCSI] mvsas: change SL mode0 register value

-- change connection behavior
-- set bit8 to 1 for performance tuning
-- set bit0 to 0 to enable retry for no_dest reject case.

Signed-off-by: Xiangliang Yu <yuxiangl@marvell.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
drivers/scsi/mvsas/mv_94xx.c diff | blob | history
Linux for Marvell Sheeva based platforms