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(parent: b10690d) | patch
arm64: dts: h3ulcb: enable SCIF clk and pins
authorVladimir Barinov <vladimir.barinov@cogentembedded.com>
Wed, 31 Aug 2016 10:02:49 +0000 (13:02 +0300)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 6 Sep 2016 10:57:24 +0000 (12:57 +0200)
commitaf111bce5437c6d4174434c9f5002f463f83d651
treea8a3417ea8154b4df068690310fe8726a4a59c80tree | snapshot
parentb10690d11fead70652c2544098e41436258ec443commit | diff
arm64: dts: h3ulcb: enable SCIF clk and pins

This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts diff | blob | history
Beck SC1x5 Kernel