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ASoC: fsl_esai: Bypass divider settings if clock requirement is not changed
authorNicolin Chen <Guangyu.Chen@freescale.com>
Tue, 6 May 2014 08:56:01 +0000 (16:56 +0800)
committerNitin Garg <nitin.garg@freescale.com>
Fri, 16 Jan 2015 03:16:51 +0000 (21:16 -0600)
commitb625c4b9cef29778e96b7f8836632540aff62950
treee210aa8df3073269ef987eac535760b3dad3fe75tree | snapshot
parenta6fe1a139b89606d3dc3af1cae074bc8de2a311ccommit | diff
ASoC: fsl_esai: Bypass divider settings if clock requirement is not changed

We don't need to change those dividers if bclk and mclk remains the same
directions and values.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit f975ca46f634660a52d8c815b465258ae9bce3b7)
sound/soc/fsl/fsl_esai.c diff | blob | history
Linux kernel for KaRo TX COM modules