ENGR00215041-2 MX6 SabreSD:Set clko parent to be clko2

ENGR00215041-2 MX6 SabreSD:Set clko parent to be clko2

On MX6 SabreSD board, gpio_0 is muxed to clko to be
audio mclk and camera mclk. 24MHz osc clk is a stable
clock source, which can meet the requirement of audio
mclk and camera mclk. This patch sets clko parent
clock to be clko2 clock so that camera mclk and audio
mclk can source from osc clk.
There are 2 benifits after applying this patch:
1) clko's original parent clock(pll4_audio_main_clk)
can be gated off to save power or used by another
module.
2) ov5640/ov5642 camera most settings can reach
claimed 15fps or 30fps with no human eye recognizable
video quality downgrade.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit ace3723ceff0d546e0176f74ad38d58a6d11b7ee)