ENGR00269449 mx6q/sdl clk:Correct register writing for aclk_podf

ENGR00269449 mx6q/sdl clk:Correct register writing for aclk_podf

We need to pay attention to writing the 'CCM Serial Clock Multiplexer
Register 1' register since the write value/divider map and the read
value/divider for aclk_podf field are different. In order to keep
the divider value unchanged when writing the other fields of the
register, we need to fixup the write value.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>