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(parent: fab16f0) | patch
arm64: Cache maintenance routines
authorCatalin Marinas <catalin.marinas@arm.com>
Mon, 5 Mar 2012 11:49:28 +0000 (11:49 +0000)
committerCatalin Marinas <catalin.marinas@arm.com>
Fri, 7 Sep 2012 15:14:30 +0000 (16:14 +0100)
commitd43927ec2bb704283cd1586d9d39abb32b187d43
tree6f15cfbb23894a95e96bdb62c0151ec6058a0341tree | snapshot
parentfab16f09e3c83aa3483d2b98c9ce6d39dbdb8be3commit | diff
arm64: Cache maintenance routines

The patch adds functionality required for cache maintenance. The AArch64
architecture mandates non-aliasing VIPT or PIPT D-cache and VIPT (may
have aliases) or ASID-tagged VIVT I-cache. Cache maintenance operations
are automatically broadcast in hardware between CPUs.

Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Tony Lindgren <tony@atomide.com>
arch/arm64/include/asm/cache.h [new file with mode: 0644] blob
arch/arm64/include/asm/cacheflush.h [new file with mode: 0644] blob
arch/arm64/include/asm/cachetype.h [new file with mode: 0644] blob
arch/arm64/mm/cache.S [new file with mode: 0644] blob
arch/arm64/mm/flush.c [new file with mode: 0644] blob
Linux kernel for KaRo TX COM modules