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(parent: f915084) | patch
drm/i915: Forcewake Register Range changes for CHV
authorDeepak S <deepak.s@linux.intel.com>
Thu, 11 Dec 2014 16:12:49 +0000 (21:42 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 15 Dec 2014 08:54:23 +0000 (09:54 +0100)
commitdb5ff4ac97f6602360645414b698a05f91b40542
tree3cb61be3e7d5405cefd690e24732d8ce8416aa8dtree | snapshot
parentf915084edc5aad351d6a4675b0bcdded9a00090dcommit | diff
drm/i915: Forcewake Register Range changes for CHV

According to updated BSpec, Render/Common/media Wells register range changed.
Updating the same to match the spec and avoid extra forcewake for none
forcewake range.

v2: Update media forcewake range (Ville)

Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_uncore.c diff | blob | history
Beck SC1x5 Kernel