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(parent: aa127c8) | patch
arch/tile: support <asm/cachectl.h> header for cacheflush() syscall
authorChris Metcalf <cmetcalf@tilera.com>
Thu, 29 Mar 2012 19:25:59 +0000 (15:25 -0400)
committerChris Metcalf <cmetcalf@tilera.com>
Mon, 2 Apr 2012 19:37:00 +0000 (15:37 -0400)
commitdd32cf98e7e23f75f997c38e536713167ae43a47
tree37affa12acf5b4131fe592197b7e0778ce5c383atree | snapshot
parentaa127c855d1eee51ce3a7488b71b6c7e50099bcacommit | diff
arch/tile: support <asm/cachectl.h> header for cacheflush() syscall

We already had a syscall that did some dcache flushing, but it was
not used in practice.  Make it MIPS compatible instead so it can
do both the DCACHE and ICACHE actions.  We have code that wants to
be able to use the ICACHE flush mode from userspace so this change
enables that.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
arch/tile/include/asm/Kbuild diff | blob | history
arch/tile/include/asm/cachectl.h [new file with mode: 0644] blob
arch/tile/include/asm/compat.h diff | blob | history
arch/tile/include/asm/syscalls.h diff | blob | history
arch/tile/include/asm/unistd.h diff | blob | history
arch/tile/kernel/sys.c diff | blob | history
Linux kernel for KaRo TX COM modules