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(parent: dba4072) | patch
clk: tegra: Add TEGRA_PLL_BYPASS flag
authorPeter De Schrijver <pdeschrijver@nvidia.com>
Wed, 3 Apr 2013 14:40:37 +0000 (17:40 +0300)
committerStephen Warren <swarren@nvidia.com>
Thu, 4 Apr 2013 22:10:38 +0000 (16:10 -0600)
commitdd93587be8dc8acf23a0d8a23efc74a91d8f0dfe
tree10a49812292f09a9b5d5d33fb09cc895dfb16b32tree | snapshot
parentdba4072a4a20b2986562cced98ce04a887614528commit | diff
clk: tegra: Add TEGRA_PLL_BYPASS flag

Not all PLLs in Tegra114 have a bypass bit. Adapt the common code to only use
this bit when available.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
drivers/clk/tegra/clk-pll.c diff | blob | history
drivers/clk/tegra/clk.h diff | blob | history
Linux kernel for KaRo TX COM modules