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ARM: l2c: exynos: remove cache size override
authorRussell King <rmk+kernel@arm.linux.org.uk>
Wed, 19 Mar 2014 12:07:34 +0000 (12:07 +0000)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Thu, 29 May 2014 23:49:10 +0000 (00:49 +0100)
commitdfbdd3d55403ebd29a355e907e53576ce57c6d96
tree823c0c626260f6005661843afc97342af883ed56tree | snapshot
parent24cb65feab42ac0cc26464ac4b7a38c0ab7ce173commit | diff
ARM: l2c: exynos: remove cache size override

The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP.  Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code.  Remove them so we can find out which really need
this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mach-exynos/exynos.c diff | blob | history
Beck SC1x5 Kernel