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(parent: 9e7b6d3) | patch
dts: vt8500: Correct reference clock on WM8850 SoCs
authorTony Prisk <linux@prisktech.co.nz>
Fri, 17 May 2013 09:30:05 +0000 (21:30 +1200)
committerTony Prisk <linux@prisktech.co.nz>
Mon, 3 Jun 2013 19:31:22 +0000 (07:31 +1200)
commite36572b64df358f0bc3a508e8761c81d7f3b8215
treeaf553a9714e8e71e26f1d80431e3e5548234814etree | snapshot
parent9e7b6d3eda8551912b0cf9507ca5f489a476d522commit | diff
dts: vt8500: Correct reference clock on WM8850 SoCs

WM8850 SoCs use a 24Mhz reference clock for the PLLs but the SoC file
currently parents all PLLs to the 25Mhz reference clock.

This patch corrects the PLL parent clock references.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
arch/arm/boot/dts/wm8850.dtsi diff | blob | history
Beck SC1x5 Kernel