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ENGR00229924 MX6SL-Fix MMDC FIFO reset code.
authorRanjani Vaidyanathan <ra5478@freescale.com>
Tue, 16 Oct 2012 13:15:03 +0000 (08:15 -0500)
committerLothar Waßmann <LW@KARO-electronics.de>
Fri, 24 May 2013 06:35:34 +0000 (08:35 +0200)
commite5e17bc958c147d18a1487ece62c7272e09ac308
tree900836242936f8d64ffcab4ad5a352db795d038ctree | snapshot
parent0852eef8944e374aaf20a4e53ffff57d4a14c2c9commit | diff
ENGR00229924 MX6SL-Fix MMDC FIFO reset code.

Write to the MMDC registers when resetting the MMDC after the
DDR I/Os have been floated.

This fixes the bug introduced by the commit:
"2a2f65bd07ad0f947794c2e5f2f825121805d663
MX6SL-Reset MMDC read FIFO in low power IDLE"

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
arch/arm/mach-mx6/mx6sl_wfi.S diff | blob | history
Linux kernel for KaRo TX COM modules