ENGR00227420 mmc: sdhci: shorten the delay on disabling clk

ENGR00227420 mmc: sdhci: shorten the delay on disabling clk

- change the delay from 10 * HZ to 1 * HZ, though (1 * HZ) might not be the
best, just as a base.
1. Since the request has been moved out of interrupt context, there will be no
more calling enable_clk in interrupt context. So it's not necessary to keep
such a long delay on disabling clock in order to save power.
2. Still keeping the 1*HZ of delay is to avoid frequently enabling/disabling
clock.

eMMC card performance test result with bonnie++:
(512M RAM, 1GB data, 1K buffer)
------------------------------------------------------------------------------
|             |           1*HZ               |            10 * HZ            |
------------------------------------------------------------------------------
|    Read     |          ~24.1MB/s           |            ~23.9MB/s          |
------------------------------------------------------------------------------
|    Write    |          ~10.5MB/s           |            ~10.5MB/s          |
------------------------------------------------------------------------------

WiFi card performance test result with iperf is quite same: ~21Mbps
(AR6003@2.4G, TCP, TCP window size option 1MB both for server and client)

Acked-by: Robby CAI <r63905@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>