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OMAPDSS: HDMI: Modify logic to configure MCLK
authorRicardo Neri <ricardo.neri@ti.com>
Tue, 31 Jan 2012 21:56:16 +0000 (15:56 -0600)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Tue, 21 Feb 2012 07:40:22 +0000 (09:40 +0200)
commitf15511e23db4e1deb6bf6a3c88c04ba85434e142
tree95a9785a6a6f5f528de86ea439f43ff6f6f43e2ftree | snapshot
parentd8989d96eb35335e4e464369da7bdb28e8c84a9fcommit | diff
OMAPDSS: HDMI: Modify logic to configure MCLK

The MCLK mode defines a factor to divide the clock that is used to
generate the Audio Clock Regeneration packets, MCLK.

The divisor is not used when the CTS value is calculated by HW.
When the value is calculated by SW, it depends on the silicon
revision.

Signed-off-by: Ricardo Neri <ricardo.neri@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
drivers/video/omap2/dss/hdmi.c diff | blob | history
Linux for Marvell Sheeva based platforms