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(parent: 6c49f24) | patch
drm/i915: update FBC maximum fb sizes
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Tue, 4 Jun 2013 19:53:39 +0000 (16:53 -0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 6 Jun 2013 13:19:04 +0000 (15:19 +0200)
commitf85da868e3b998394634209cc1e48e0f4126901b
treecbc81d948e1f87a3d55fe3ab705482f2c0948840tree | snapshot
parent6c49f24180c308a07be3f1d59ee7af33184ba17ecommit | diff
drm/i915: update FBC maximum fb sizes

CTG/ILK/SNB/IVB support 4kx2k surfaces. HSW supports 4kx4k, but
without proper front buffer invalidation on the last 2k lines, so
don't enable FBC on these cases for now.

v2: Use gen >= 5, not gen > 4 (Daniel).

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_pm.c diff | blob | history
Beck SC1x5 Kernel