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(parent: 06ece09) | patch
arch/tile: support <asm/cachectl.h> header for cacheflush() syscall
authorChris Metcalf <cmetcalf@tilera.com>
Thu, 29 Mar 2012 19:25:59 +0000 (15:25 -0400)
committerChris Metcalf <cmetcalf@tilera.com>
Thu, 12 Apr 2012 16:38:25 +0000 (12:38 -0400)
commitf8b902a004d99ba98c3acc8f150dec2bde5fe330
treec9e223dda56921b24a7fc7fd0d1e6e3d5330df18tree | snapshot
parent06ece09a5a04308fceaa956c7c1927bd4a417d98commit | diff
arch/tile: support <asm/cachectl.h> header for cacheflush() syscall

We already had a syscall that did some dcache flushing, but it was
not used in practice.  Make it MIPS compatible instead so it can
do both the DCACHE and ICACHE actions.  We have code that wants to
be able to use the ICACHE flush mode from userspace so this change
enables that.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
arch/tile/include/asm/Kbuild diff | blob | history
arch/tile/include/asm/cachectl.h [new file with mode: 0644] blob
arch/tile/include/asm/compat.h diff | blob | history
arch/tile/include/asm/syscalls.h diff | blob | history
arch/tile/include/asm/unistd.h diff | blob | history
arch/tile/kernel/sys.c diff | blob | history
Linux kernel for KaRo TX COM modules