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ARM: dts: socfpga: add the clk-phase property for sd/mmc clock
authorDinh Nguyen <dinguyen@opensource.altera.com>
Tue, 5 Jan 2016 20:59:38 +0000 (14:59 -0600)
committerDinh Nguyen <dinguyen@kernel.org>
Mon, 11 Apr 2016 18:47:22 +0000 (13:47 -0500)
commitfaf68cdfdf6c9f0999686802ad066b1378b89413
treee2bbd8f97d29c3bf1c1e5955277f963c3cb52183tree | snapshot
parentd07e187cf0621891514a47f316597fea8963e5a7commit | diff
ARM: dts: socfpga: add the clk-phase property for sd/mmc clock

The CIU clock for the SD/MMC should be the sdmmc_clk and not the
sdmmc_free_clk. Also, add the correct phase shift the sdmmc_clk.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
arch/arm/boot/dts/socfpga_arria10.dtsi diff | blob | history
Beck SC1x5 Kernel