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ARM: cache-v7: optimise test for Cortex A9 r0pX devices
authorRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 3 Apr 2015 10:32:34 +0000 (11:32 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Fri, 3 Apr 2015 10:56:52 +0000 (11:56 +0100)
commitff6c8137b54a2d027f5292ca0580a07d14c97686
tree6e2f97ccdf5839b6ffa1b5928ff9d1fb83cbb693tree | snapshot
parent518519c8c8e5de1a2556c14b733e4d2a4f5c8168commit | diff
ARM: cache-v7: optimise test for Cortex A9 r0pX devices

Eliminate one unnecessary instruction from this test by pre-shifting
the Cortex A9 ID - we can shift the actual ID in the teq instruction
thereby losing the pX bit of the ID at no cost.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/mm/cache-v7.S diff | blob | history
Linux kernel for KaRo TX COM modules