#define RN5T567_DC2CTL2 0x2f
#define RN5T567_DC3CTL 0x30
#define RN5T567_DC3CTL2 0x31
+#define RN5T567_DC4CTL 0x32
+#define RN5T567_DC4CTL2 0x33
#define RN5T567_DC1DAC 0x36
#define RN5T567_DC2DAC 0x37
#define RN5T567_DC3DAC 0x38
#define RN5T567_DC2DAC_SLP 0x3c
#define RN5T567_DC3DAC_SLP 0x3d
#define RN5T567_DC4DAC_SLP 0x3e
+#define RN5T567_IREN 0x40
#define RN5T567_LDOEN1 0x44
#define RN5T567_LDOEN2 0x45
#define RN5T567_LDODIS 0x46
#define RN5T567_LDO4DAC 0x4f
#define RN5T567_LDO5DAC 0x50
#define RN5T567_LDORTC1DAC 0x56 /* VBACKUP */
+#define RN5T567_IOSEL 0x90
+#define RN5T567_IOOUT 0x91
+#define RN5T567_GPEDGE1 0x92
+#define RN5T567_EN_GPIR 0x94
+#define RN5T567_INTPOL 0x9c
+#define RN5T567_INTEN 0x9d
#define NOETIMSET_DIS_OFF_NOE_TIM (1 << 3)
-#define DC2_DC2EN (1 << 0)
-#define DC2_DC2DIS (1 << 1)
+#define DCnCTL_DCnEN (1 << 0)
+#define DCnCTL_DCnDIS (1 << 1)
+#define DCnMODE(m) (((m) & 0x3) << 4)
+#define DCnMODE_SLP(m) (((m) & 0x3) << 6)
+#define DCnMODE_AUTO 0
+#define DCnMODE_PWM 1
+#define DCnMODE_PSM 2
/* calculate voltages in 10mV */
-#define rn5t_v2r(v,n,m) DIV_ROUND(((((v) < (n)) ? (n) : (v)) - (n)), (m))
+#define rn5t_v2r(v,n,m) DIV_ROUND(((((v) * 10 < (n)) ? (n) : (v) * 10) - (n)), m)
#define rn5t_r2v(r,n,m) (((r) * (m) + (n)) / 10)
/* DCDC1-4 */
-#define rn5t_mV_to_regval(mV) rn5t_v2r((mV) * 10, 6000, 125)
+#define rn5t_mV_to_regval(mV) rn5t_v2r(mV, 6000, 125)
#define rn5t_regval_to_mV(r) rn5t_r2v(r, 6000, 125)
/* LDO1-2, 4-5 */
-#define rn5t_mV_to_regval2(mV) rn5t_v2r((mV) * 10, 9000, 250)
-#define rn5t_regval2_to_mV(r) rn5t_r2v(r, 9000, 250)
+#define rn5t_mV_to_regval2(mV) (rn5t_v2r(mV, 9000, 500) << 1)
+#define rn5t_regval2_to_mV(r) rn5t_r2v((r) >> 1, 9000, 500)
/* LDO3 */
-#define rn5t_mV_to_regval3(mV) rn5t_v2r((mV) * 10, 6000, 250)
-#define rn5t_regval3_to_mV(r) rn5t_r2v(r, 6000, 250)
+#define rn5t_mV_to_regval3(mV) (rn5t_v2r(mV, 6000, 500) << 1)
+#define rn5t_regval3_to_mV(r) rn5t_r2v((r) >> 1, 6000, 500)
/* LDORTC */
-#define rn5t_mV_to_regval_rtc(mV) rn5t_v2r((mV) * 10, 12000, 250)
-#define rn5t_regval_rtc_to_mV(r) rn5t_r2v(r, 12000, 250)
+#define rn5t_mV_to_regval_rtc(mV) (rn5t_v2r(mV, 12000, 500) << 1)
+#define rn5t_regval_rtc_to_mV(r) rn5t_r2v((r) >> 1, 12000, 500)
'6', /* TX6Q-1036 1GiB SDRAM 64bit; 8GiB eMMC */
};
+#ifdef CONFIG_RN5T567
+/* PMIC settings */
+#define VDD_RTC_VAL rn5t_mV_to_regval_rtc(3000)
+#define VDD_CORE_VAL rn5t_mV_to_regval(1400) /* DCDC1 */
+#define VDD_CORE_VAL_LP rn5t_mV_to_regval(900)
+#define VDD_SOC_VAL rn5t_mV_to_regval(1400) /* DCDC2 */
+#define VDD_SOC_VAL_LP rn5t_mV_to_regval(1400)
+#define VDD_DDR_VAL rn5t_mV_to_regval(1350) /* DCDC3 */
+#define VDD_DDR_VAL_LP rn5t_mV_to_regval(1350)
+#define VDD_HIGH_VAL rn5t_mV_to_regval(3000) /* DCDC4 */
+#define VDD_HIGH_VAL_LP rn5t_mV_to_regval(3000)
+#define VDD_IO_INT_VAL rn5t_mV_to_regval2(3300) /* LDO1 */
+#define VDD_IO_INT_VAL_LP rn5t_mV_to_regval2(3300)
+#define VDD_IO_EXT_VAL rn5t_mV_to_regval2(3300) /* LDO2 */
+#define VDD_IO_EXT_VAL_LP rn5t_mV_to_regval2(3300)
+
+static struct pmic_regs rn5t567_regs[] = {
+ { RN5T567_NOETIMSET, 0x5, },
+ { RN5T567_DC1DAC, VDD_CORE_VAL, },
+ { RN5T567_DC2DAC, VDD_SOC_VAL, },
+ { RN5T567_DC3DAC, VDD_DDR_VAL, },
+ { RN5T567_DC4DAC, VDD_HIGH_VAL, },
+ { RN5T567_DC1DAC_SLP, VDD_CORE_VAL_LP, },
+ { RN5T567_DC2DAC_SLP, VDD_SOC_VAL_LP, },
+ { RN5T567_DC3DAC_SLP, VDD_DDR_VAL_LP, },
+ { RN5T567_DC4DAC_SLP, VDD_HIGH_VAL_LP, },
+ { RN5T567_DC1CTL, DCnCTL_DCnEN | DCnMODE_SLP(DCnMODE_PSM), },
+ { RN5T567_DC2CTL, DCnCTL_DCnEN | DCnMODE_SLP(DCnMODE_PSM), },
+ { RN5T567_DC3CTL, DCnCTL_DCnEN | DCnMODE_SLP(DCnMODE_PSM), },
+ { RN5T567_DC4CTL, DCnCTL_DCnEN | DCnMODE_SLP(DCnMODE_PSM), },
+ { RN5T567_LDORTC1DAC, VDD_RTC_VAL, },
+ { RN5T567_LDORTC1_SLOT, 0x0f, ~0x3f, },
+ { RN5T567_LDO1DAC, VDD_IO_INT_VAL, },
+ { RN5T567_LDO2DAC, VDD_IO_EXT_VAL, },
+ { RN5T567_LDOEN1, 0x03, ~0x1f, },
+ { RN5T567_LDOEN2, 0x10, ~0x30, },
+ { RN5T567_LDODIS, 0x1c, ~0x1f, },
+ { RN5T567_INTPOL, 0, },
+ { RN5T567_INTEN, 0x3, },
+ { RN5T567_IREN, 0xf, },
+ { RN5T567_EN_GPIR, 0, },
+};
+#endif
+
static struct {
uchar addr;
uchar rev;
+ struct pmic_regs *regs;
+ size_t num_regs;
} tx6_mod_revs[] = {
- { 0x3c, 1, },
- { 0x32, 2, },
- { 0x33, 3, },
+#ifdef CONFIG_LTC3676
+ { 0x3c, 1, NULL, 0, },
+#endif
+#ifdef CONFIG_RN5T567
+ { 0x33, 3, rn5t567_regs, ARRAY_SIZE(rn5t567_regs), },
+#endif
};
static inline char tx6_mem_suffix(void)
return 0;
}
- ret = tx6_pmic_init(pmic_addr, NULL, 0);
+ ret = tx6_pmic_init(pmic_addr, tx6_mod_revs[pmic_id].regs,
+ tx6_mod_revs[pmic_id].num_regs);
if (ret) {
printf("Failed to setup PMIC voltages: %d\n", ret);
hang();