ARM: GIC: Make MULTI_IRQ_HANDLER mandatory

Now that MULTI_IRQ_HANDLER is selected by all the in-tree
GIC users, make it mandatory and remove the unused macros.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d99ee9ba2324084717954118beb9fa8a7524c4a5..44789eff983f444c22cd967cbe418f7e50159358 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -278,7 +278,6 @@ config ARCH_REALVIEW
        select ARM_TIMER_SP804
        select GPIO_PL061 if GPIOLIB
        select NEED_MACH_MEMORY_H
        select ARM_TIMER_SP804
        select GPIO_PL061 if GPIOLIB
        select NEED_MACH_MEMORY_H

-       select MULTI_IRQ_HANDLER

        help
          This enables support for ARM Ltd RealView boards.
 
        help
          This enables support for ARM Ltd RealView boards.
 


@@ -311,7 +310,6 @@ config ARCH_VEXPRESS
        select ICST
        select PLAT_VERSATILE
        select PLAT_VERSATILE_CLCD
        select ICST
        select PLAT_VERSATILE
        select PLAT_VERSATILE_CLCD

-       select MULTI_IRQ_HANDLER

        help
          This enables support for the ARM Ltd Versatile Express boards.
 
        help
          This enables support for the ARM Ltd Versatile Express boards.
 


@@ -347,7 +345,6 @@ config ARCH_HIGHBANK
        select GENERIC_CLOCKEVENTS
        select HAVE_ARM_SCU
        select USE_OF
        select GENERIC_CLOCKEVENTS
        select HAVE_ARM_SCU
        select USE_OF

-       select MULTI_IRQ_HANDLER

        help
          Support for the Calxeda Highbank SoC based boards.
 
        help
          Support for the Calxeda Highbank SoC based boards.
 


@@ -366,7 +363,6 @@ config ARCH_CNS3XXX
        select ARM_GIC
        select MIGHT_HAVE_PCI
        select PCI_DOMAINS if PCI
        select ARM_GIC
        select MIGHT_HAVE_PCI
        select PCI_DOMAINS if PCI

-       select MULTI_IRQ_HANDLER

        help
          Support for Cavium Networks CNS3XXX platform.
 
        help
          Support for Cavium Networks CNS3XXX platform.
 


@@ -855,7 +851,6 @@ config ARCH_EXYNOS
        select HAVE_S3C2410_I2C if I2C
        select HAVE_S3C2410_WATCHDOG if WATCHDOG
        select NEED_MACH_MEMORY_H
        select HAVE_S3C2410_I2C if I2C
        select HAVE_S3C2410_WATCHDOG if WATCHDOG
        select NEED_MACH_MEMORY_H

-       select MULTI_IRQ_HANDLER

        help
          Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 
        help
          Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 


@@ -979,7 +974,6 @@ config ARCH_ZYNQ
        select ARM_AMBA
        select ICST
        select USE_OF
        select ARM_AMBA
        select ICST
        select USE_OF

-       select MULTI_IRQ_HANDLER

        help
          Support for Xilinx Zynq ARM Cortex A9 Platform
 endchoice
        help
          Support for Xilinx Zynq ARM Cortex A9 Platform
 endchoice

diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig
index a3beda1213da08ccae33fe86996371addd295d4d..a11cee523cd42ec0a8ea8e2e78ff6266fc1f5270 100644 (file)
--- a/arch/arm/common/Kconfig
+++ b/arch/arm/common/Kconfig
@@ -1,5 +1,6 @@
 config ARM_GIC
        select IRQ_DOMAIN
 config ARM_GIC
        select IRQ_DOMAIN

+       select MULTI_IRQ_HANDLER

        bool
 
 config GIC_NON_BANKED
        bool
 
 config GIC_NON_BANKED

diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c
index 3c78b7c60691ec0ddecee5c50d4297a346889f6f..a1feb6b4f9f545f6d53d6e78bf1d04d62b6d4bdd 100644 (file)
--- a/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@ -71,9 +71,6 @@ struct gic_chip_data {
 
 static DEFINE_RAW_SPINLOCK(irq_controller_lock);
 
 
 static DEFINE_RAW_SPINLOCK(irq_controller_lock);
 

-/* Address of GIC 0 CPU interface */
-void __iomem *gic_cpu_base_addr __read_mostly;
-

 /*
  * Supported arch specific GIC irq extension.
  * Default make them NULL.
 /*
  * Supported arch specific GIC irq extension.
  * Default make them NULL.


@@ -700,7 +697,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
         * For secondary GICs, skip over PPIs, too.
         */
        if (gic_nr == 0) {
         * For secondary GICs, skip over PPIs, too.
         */
        if (gic_nr == 0) {

-               gic_cpu_base_addr = cpu_base;

                domain->hwirq_base = 16;
                if (irq_start > 0)
                        irq_start = (irq_start & ~31) + 16;
                domain->hwirq_base = 16;
                if (irq_start > 0)
                        irq_start = (irq_start & ~31) + 16;

diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S
deleted file mode 100644 (file)
index 74ebc80..0000000
--- a/arch/arm/include/asm/hardware/entry-macro-gic.S
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * arch/arm/include/asm/hardware/entry-macro-gic.S
- *
- * Low-level IRQ helper macros for GIC
- *
- * This file is licensed under  the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#include <asm/hardware/gic.h>
-
-#ifndef HAVE_GET_IRQNR_PREAMBLE
-       .macro  get_irqnr_preamble, base, tmp
-       ldr     \base, =gic_cpu_base_addr
-       ldr     \base, [\base]
-       .endm
-#endif
-
-/*
- * The interrupt numbering scheme is defined in the
- * interrupt controller spec.  To wit:
- *
- * Interrupts 0-15 are IPI
- * 16-31 are local.  We allow 30 to be used for the watchdog.
- * 32-1020 are global
- * 1021-1022 are reserved
- * 1023 is "spurious" (no interrupt)
- *
- * A simple read from the controller will tell us the number of the highest
- * priority enabled interrupt.  We then just need to check whether it is in the
- * valid range for an IRQ (30-1020 inclusive).
- */
-
-       .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-       ldr     \irqstat, [\base, #GIC_CPU_INTACK]
-       /* bits 12-10 = src CPU, 9-0 = int # */
-
-       ldr     \tmp, =1021
-       bic     \irqnr, \irqstat, #0x1c00
-       cmp     \irqnr, #15
-       cmpcc   \irqnr, \irqnr
-       cmpne   \irqnr, \tmp
-       cmpcs   \irqnr, \irqnr
-       .endm
-
-/* We assume that irqstat (the raw value of the IRQ acknowledge
- * register) is preserved from the macro above.
- * If there is an IPI, we immediately signal end of interrupt on the
- * controller, since this requires the original irqstat value which
- * we won't easily be able to recreate later.
- */
-
-       .macro test_for_ipi, irqnr, irqstat, base, tmp
-       bic     \irqnr, \irqstat, #0x1c00
-       cmp     \irqnr, #16
-       strcc   \irqstat, [\base, #GIC_CPU_EOI]
-       cmpcs   \irqnr, \irqnr
-       .endm

diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h
index ecf7c02fa16cf73bb940f2035bf00ac93ac28981..4bdfe0018696610f30fdfc41d197bd6c096d9777 100644 (file)
--- a/arch/arm/include/asm/hardware/gic.h
+++ b/arch/arm/include/asm/hardware/gic.h
@@ -36,7 +36,6 @@
 #include <linux/irqdomain.h>
 struct device_node;
 
 #include <linux/irqdomain.h>
 struct device_node;
 

-extern void __iomem *gic_cpu_base_addr;

 extern struct irq_chip gic_arch_extn;
 
 void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
 extern struct irq_chip gic_arch_extn;
 
 void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,

diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index ba36b74881c63aeea9dc4dd15038be2b0cddc234..ebde97f5d5f0d94035792972722331862a0ebdd6 100644 (file)
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -50,7 +50,6 @@ config ARCH_MSM8X60
        select GPIO_MSM_V2
        select MSM_GPIOMUX
        select MSM_SCM if SMP
        select GPIO_MSM_V2
        select MSM_GPIOMUX
        select MSM_SCM if SMP

-       select MULTI_IRQ_HANDLER

 
 config ARCH_MSM8960
        bool "MSM8960"
 
 config ARCH_MSM8960
        bool "MSM8960"


@@ -61,7 +60,6 @@ config ARCH_MSM8960
        select MSM_V2_TLMM
        select MSM_GPIOMUX
        select MSM_SCM if SMP
        select MSM_V2_TLMM
        select MSM_GPIOMUX
        select MSM_SCM if SMP

-       select MULTI_IRQ_HANDLER

 
 endchoice
 
 
 endchoice
 

diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 9a6d818734267535456bf425c0ad2d8f2e7d77c7..22f7c97a27288f6a2faddfe39cf8898f79347967 100644 (file)
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -37,6 +37,7 @@ config ARCH_OMAP3
        select ARCH_HAS_OPP
        select PM_OPP if PM
        select ARM_CPU_SUSPEND if PM
        select ARCH_HAS_OPP
        select PM_OPP if PM
        select ARM_CPU_SUSPEND if PM

+       select MULTI_IRQ_HANDLER

 
 config ARCH_OMAP4
        bool "TI OMAP4"
 
 config ARCH_OMAP4
        bool "TI OMAP4"

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index a6faa5033507b5196594130746995f1c51d4061b..91aff7cb828411843b2c87a71e6350e6abeb50b0 100644 (file)
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -13,7 +13,6 @@ config ARCH_TEGRA_2x_SOC
        select USB_ARCH_HAS_EHCI if USB_SUPPORT
        select USB_ULPI if USB_SUPPORT
        select USB_ULPI_VIEWPORT if USB_SUPPORT
        select USB_ARCH_HAS_EHCI if USB_SUPPORT
        select USB_ULPI if USB_SUPPORT
        select USB_ULPI_VIEWPORT if USB_SUPPORT

-       select MULTI_IRQ_HANDLER

        help
          Support for NVIDIA Tegra AP20 and T20 processors, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
        help
          Support for NVIDIA Tegra AP20 and T20 processors, based on the
          ARM CortexA9MP CPU and the ARM PL310 L2 cache controller

diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index bb2b52b03904e1888acc741844f5d03d024abe36..a3e0c8692f0d1ddabd689f35c86f6e358c5d49ba 100644 (file)
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -7,7 +7,6 @@ config UX500_SOC_COMMON
        select HAS_MTU
        select ARM_ERRATA_753970
        select ARM_ERRATA_754322
        select HAS_MTU
        select ARM_ERRATA_753970
        select ARM_ERRATA_754322

-       select MULTI_IRQ_HANDLER

 
 menu "Ux500 SoC"
 
 
 menu "Ux500 SoC"
 

diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index 4a1cc5891682d0594d2e7386304b20c3592fac17..aa59f4247dc53bba585fa7f93e050c10902a0708 100644 (file)
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -24,7 +24,6 @@ config ARCH_OMAP2PLUS
        select CLKDEV_LOOKUP
        select GENERIC_IRQ_CHIP
        select OMAP_DM_TIMER
        select CLKDEV_LOOKUP
        select GENERIC_IRQ_CHIP
        select OMAP_DM_TIMER

-       select MULTI_IRQ_HANDLER

        help
          "Systems based on OMAP2, OMAP3 or OMAP4"
 
        help
          "Systems based on OMAP2, OMAP3 or OMAP4"