- write_phy_ofdm(dev, 0x0, 0x1); mdelay(1);
- write_phy_ofdm(dev, 0x1, 0x2); mdelay(1);
- write_phy_ofdm(dev, 0x2, ((priv->card_type == USB)? 0x42 : 0x62)); mdelay(1);
- write_phy_ofdm(dev, 0x3, 0x0); mdelay(1);
- write_phy_ofdm(dev, 0x4, 0x0); mdelay(1);
- write_phy_ofdm(dev, 0x5, 0x0); mdelay(1);
- write_phy_ofdm(dev, 0x6, 0x40); mdelay(1);
- write_phy_ofdm(dev, 0x7, 0x0); mdelay(1);
- write_phy_ofdm(dev, 0x8, 0x40); mdelay(1);
- write_phy_ofdm(dev, 0x9, 0xfe); mdelay(1);
-
- write_phy_ofdm(dev, 0xa, 0x8); mdelay(1);
-
- //write_phy_ofdm(dev, 0x18, 0xef);
- // }
- //}
- write_phy_ofdm(dev, 0xb, 0x80); mdelay(1);
-
- write_phy_ofdm(dev, 0xc, 0x1);mdelay(1);
-
-
- //if(priv->card_type != USB)
- write_phy_ofdm(dev, 0xd, 0x43);
-
- write_phy_ofdm(dev, 0xe, 0xd3);mdelay(1);
-
-
- write_phy_ofdm(dev, 0xf, 0x38);mdelay(1);
-/*ver D & 8187*/
-// }
-
-// if(priv->card_8185 == 1 && priv->card_8185_Bversion)
-// write_phy_ofdm(dev, 0x10, 0x04);/*ver B*/
-// else
- write_phy_ofdm(dev, 0x10, 0x84);mdelay(1);
-/*ver C & D & 8187*/
-
- write_phy_ofdm(dev, 0x11, 0x07);mdelay(1);
-/*agc resp time 700*/
-
-
-// if(priv->card_8185 == 2){
- /* Ver D & 8187*/
- write_phy_ofdm(dev, 0x12, 0x20);mdelay(1);
-
- write_phy_ofdm(dev, 0x13, 0x20);mdelay(1);
-
- write_phy_ofdm(dev, 0x14, 0x0); mdelay(1);
+ write_phy_ofdm(dev, 0x00, 0x01); mdelay(1);
+ write_phy_ofdm(dev, 0x01, 0x02); mdelay(1);
+ write_phy_ofdm(dev, 0x02, ((priv->card_type == USB) ? 0x42 : 0x62)); mdelay(1);
+ write_phy_ofdm(dev, 0x03, 0x00); mdelay(1);
+ write_phy_ofdm(dev, 0x04, 0x00); mdelay(1);
+ write_phy_ofdm(dev, 0x05, 0x00); mdelay(1);
+ write_phy_ofdm(dev, 0x06, 0x40); mdelay(1);
+ write_phy_ofdm(dev, 0x07, 0x00); mdelay(1);
+ write_phy_ofdm(dev, 0x08, 0x40); mdelay(1);
+ write_phy_ofdm(dev, 0x09, 0xfe); mdelay(1);
+ write_phy_ofdm(dev, 0x0a, 0x08); mdelay(1);
+ write_phy_ofdm(dev, 0x0b, 0x80); mdelay(1);
+ write_phy_ofdm(dev, 0x0c, 0x01); mdelay(1);
+ write_phy_ofdm(dev, 0x0d, 0x43);
+ write_phy_ofdm(dev, 0x0e, 0xd3); mdelay(1);
+ write_phy_ofdm(dev, 0x0f, 0x38); mdelay(1);
+ write_phy_ofdm(dev, 0x10, 0x84); mdelay(1);
+ write_phy_ofdm(dev, 0x11, 0x07); mdelay(1);
+ write_phy_ofdm(dev, 0x12, 0x20); mdelay(1);
+ write_phy_ofdm(dev, 0x13, 0x20); mdelay(1);
+ write_phy_ofdm(dev, 0x14, 0x00); mdelay(1);