Change the PHY clock divisor to make the MDIO clock 2.5MHz, instead of
3.5MHz (which is out of spec).
Signed-off-by: Tatyana Nikolova <Tatyana.E.Nikolova@intel.com>
Signed-off-by: Faisal Latif <Faisal.Latif@intel.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
} else {
/* setup 10G MDIO operation */
tx_config &= 0xFFFFFFE3;
} else {
/* setup 10G MDIO operation */
tx_config &= 0xFFFFFFE3;
}
nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config);
}
nes_write_indexed(nesdev, NES_IDX_MAC_TX_CONFIG, tx_config);