- ** We now need to insert a short boot section into
- ** the memory at the end of Sram2. This is normally (de)composed
- ** of the last eight bytes of the download code. The
- ** download has been assembled/compiled to expect to be
- ** loaded from 0x7FFF downwards. We have loaded it
- ** at some other address. The startup code goes into the small
- ** ram window at Sram2, in the last 8 bytes, which are really
- ** at addresses 0x7FF8-0x7FFF.
- **
- ** If the loadbase is, say, 0x7C00, then we need to branch to
- ** address 0x7BFE to run the host.bin startup code. We assemble
- ** this jump manually.
- **
- ** The two byte sequence 60 08 is loaded into memory at address
- ** 0x7FFE,F. This is a local branch to location 0x7FF8 (60 is nfix 0,
- ** which adds '0' to the .O register, complements .O, and then shifts
- ** it left by 4 bit positions, 08 is a jump .O+8 instruction. This will
- ** add 8 to .O (which was 0xFFF0), and will branch RELATIVE to the new
- ** location. Now, the branch starts from the value of .PC (or .IP or
- ** whatever the bloody register is called on this chip), and the .PC
- ** will be pointing to the location AFTER the branch, in this case
- ** .PC == 0x8000, so the branch will be to 0x8000+0xFFF8 = 0x7FF8.
- **
- ** A long branch is coded at 0x7FF8. This consists of loading a four
- ** byte offset into .O using nfix (as above) and pfix operators. The
- ** pfix operates in exactly the same way as the nfix operator, but
- ** without the complement operation. The offset, of course, must be
- ** relative to the address of the byte AFTER the branch instruction,
- ** which will be (urm) 0x7FFC, so, our final destination of the branch
- ** (loadbase-2), has to be reached from here. Imagine that the loadbase
- ** is 0x7C00 (which it is), then we will need to branch to 0x7BFE (which
- ** is the first byte of the initial two byte short local branch of the
- ** download code).
- **
- ** To code a jump from 0x7FFC (which is where the branch will start
- ** from) to 0x7BFE, we will need to branch 0xFC02 bytes (0x7FFC+0xFC02)=
- ** 0x7BFE.
- ** This will be coded as four bytes:
- ** 60 2C 20 02
- ** being nfix .O+0
- ** pfix .O+C
- ** pfix .O+0
- ** jump .O+2
- **
- ** The nfix operator is used, so that the startup code will be
- ** compatible with the whole Tp family. (lies, damn lies, it'll never
- ** work in a month of Sundays).
- **
- ** The nfix nyble is the 1s complement of the nyble value you
- ** want to load - in this case we wanted 'F' so we nfix loaded '0'.
- */
+ ** We now need to insert a short boot section into
+ ** the memory at the end of Sram2. This is normally (de)composed
+ ** of the last eight bytes of the download code. The
+ ** download has been assembled/compiled to expect to be
+ ** loaded from 0x7FFF downwards. We have loaded it
+ ** at some other address. The startup code goes into the small
+ ** ram window at Sram2, in the last 8 bytes, which are really
+ ** at addresses 0x7FF8-0x7FFF.
+ **
+ ** If the loadbase is, say, 0x7C00, then we need to branch to
+ ** address 0x7BFE to run the host.bin startup code. We assemble
+ ** this jump manually.
+ **
+ ** The two byte sequence 60 08 is loaded into memory at address
+ ** 0x7FFE,F. This is a local branch to location 0x7FF8 (60 is nfix 0,
+ ** which adds '0' to the .O register, complements .O, and then shifts
+ ** it left by 4 bit positions, 08 is a jump .O+8 instruction. This will
+ ** add 8 to .O (which was 0xFFF0), and will branch RELATIVE to the new
+ ** location. Now, the branch starts from the value of .PC (or .IP or
+ ** whatever the bloody register is called on this chip), and the .PC
+ ** will be pointing to the location AFTER the branch, in this case
+ ** .PC == 0x8000, so the branch will be to 0x8000+0xFFF8 = 0x7FF8.
+ **
+ ** A long branch is coded at 0x7FF8. This consists of loading a four
+ ** byte offset into .O using nfix (as above) and pfix operators. The
+ ** pfix operates in exactly the same way as the nfix operator, but
+ ** without the complement operation. The offset, of course, must be
+ ** relative to the address of the byte AFTER the branch instruction,
+ ** which will be (urm) 0x7FFC, so, our final destination of the branch
+ ** (loadbase-2), has to be reached from here. Imagine that the loadbase
+ ** is 0x7C00 (which it is), then we will need to branch to 0x7BFE (which
+ ** is the first byte of the initial two byte short local branch of the
+ ** download code).
+ **
+ ** To code a jump from 0x7FFC (which is where the branch will start
+ ** from) to 0x7BFE, we will need to branch 0xFC02 bytes (0x7FFC+0xFC02)=
+ ** 0x7BFE.
+ ** This will be coded as four bytes:
+ ** 60 2C 20 02
+ ** being nfix .O+0
+ ** pfix .O+C
+ ** pfix .O+0
+ ** jump .O+2
+ **
+ ** The nfix operator is used, so that the startup code will be
+ ** compatible with the whole Tp family. (lies, damn lies, it'll never
+ ** work in a month of Sundays).
+ **
+ ** The nfix nyble is the 1s complement of the nyble value you
+ ** want to load - in this case we wanted 'F' so we nfix loaded '0'.
+ */