If our client is requesting a clock that is above the maximum clock
then the following division will result in 0:
rs->max_freq / rs->speed
We'll then program 0 into the SPI_BAUDR register. The Rockchip TRM
says: "If the value is 0, the serial output clock (sclk_out) is
disabled."
It's much better to end up with the fastest possible clock rather than
a clock that is off, so enforce a minimum value.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
}
/* div doesn't support odd number */
}
/* div doesn't support odd number */
- div = rs->max_freq / rs->speed;
+ div = max_t(u32, rs->max_freq / rs->speed, 1);
div = (div + 1) & 0xfffe;
spi_enable_chip(rs, 0);
div = (div + 1) & 0xfffe;
spi_enable_chip(rs, 0);