Code cleanup.
Cc: devel@linuxdriverproject.org
Cc: linux-wireless@vger.kernel.org
Cc: Brett Rudley <brudley@broadcom.com>
Cc: Henry Ptasinski <henryp@broadcom.com>
Cc: Roland Vossen <rvossen@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
- * Copyright (c) 2010 Broadcom Corporation
+ * Copyright (c) 2011 Broadcom Corporation
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
u32 start, end, delta;
u32 origidx = ai_coreidx(sih);
chipcregs_t *cc = ai_setcoreidx(sih, SI_CC_IDX);
u32 start, end, delta;
u32 origidx = ai_coreidx(sih);
chipcregs_t *cc = ai_setcoreidx(sih, SI_CC_IDX);
start = R_REG(&cc->pmutimer);
mdelay(ILP_CALC_DUR);
end = R_REG(&cc->pmutimer);
start = R_REG(&cc->pmutimer);
mdelay(ILP_CALC_DUR);
end = R_REG(&cc->pmutimer);
/* wait for the ht to really go away */
SPINWAIT(((R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL) == 0),
10000);
/* wait for the ht to really go away */
SPINWAIT(((R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL) == 0),
10000);
- ASSERT((R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL) == 0);
}
/* update the pll changes */
}
/* update the pll changes */
/* Gate off SPROM clock and chip select signals */
si_pmu_sprom_enable(sih, false);
/* Gate off SPROM clock and chip select signals */
si_pmu_sprom_enable(sih, false);
/* initialize PMU switch/regulators */
void si_pmu_swreg_init(si_t *sih)
{
/* initialize PMU switch/regulators */
void si_pmu_swreg_init(si_t *sih)
{
switch (sih->chip) {
case BCM4336_CHIP_ID:
/* Reduce CLDO PWM output voltage to 1.2V */
switch (sih->chip) {
case BCM4336_CHIP_ID:
/* Reduce CLDO PWM output voltage to 1.2V */
chipcregs_t *cc;
uint origidx;
chipcregs_t *cc;
uint origidx;
/* Remember original core before switch to chipc */
origidx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
/* Remember original core before switch to chipc */
origidx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
[pmu_res_depend_table_sz].depend_mask);
break;
default:
[pmu_res_depend_table_sz].depend_mask);
break;
default:
if (sih->pmurev < 10)
return 0;
if (sih->pmurev < 10)
return 0;
/* Remember original core before switch to chipc */
origidx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
/* Remember original core before switch to chipc */
origidx = ai_coreidx(sih);
cc = ai_setcoreidx(sih, SI_CC_IDX);
if (R_REG(&cc->pmustatus) & PST_EXTLPOAVAIL) {
u32 ilp_ctr, alp_hz;
if (R_REG(&cc->pmustatus) & PST_EXTLPOAVAIL) {
u32 ilp_ctr, alp_hz;