+.macro setup_pll_errata pll, freq
+ ldr r2, =\pll
+ mov r1, #0x0
+ str r1, [r2, #PLL_DP_CONFIG] /* Disable auto-restart AREN bit */
+ ldr r1, =0x00001236
+ str r1, [r2, #PLL_DP_CTL] /* Restart PLL with PLM=1 */
+1: ldr r1, [r2, #PLL_DP_CTL] /* Wait for lock */
+ ands r1, r1, #0x1
+ beq 1b
+
+ ldr r5, \freq
+ str r5, [r2, #PLL_DP_MFN] /* Modify MFN value */
+ str r5, [r2, #PLL_DP_HFS_MFN]
+
+ mov r1, #0x1
+ str r1, [r2, #PLL_DP_CONFIG] /* Reload MFN value */
+
+2: ldr r1, [r2, #PLL_DP_CONFIG]
+ tst r1, #1
+ bne 2b
+
+ ldr r1, =100 /* Wait at least 4 us */
+3: subs r1, r1, #1
+ bge 3b
+
+ mov r1, #0x2
+ str r1, [r2, #PLL_DP_CONFIG] /* Enable auto-restart AREN bit */
+.endm
+