_wait_idlest_generic(clk, idlest_reg, (1 << idlest_bit),
idlest_val, __clk_get_name(clk->hw.clk));
} else {
- cm_wait_module_ready(prcm_mod, idlest_reg_id, idlest_bit);
+ omap_cm_wait_module_ready(0, prcm_mod, idlest_reg_id,
+ idlest_bit);
};
}
struct cm_ll_data {
int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
u8 *idlest_reg_id);
- int (*wait_module_ready)(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
+ int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
+ u8 idlest_shift);
};
extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
u8 *idlest_reg_id);
-extern int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
-
+int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
+ u8 idlest_shift);
extern int cm_register(struct cm_ll_data *cld);
extern int cm_unregister(struct cm_ll_data *cld);
v |= m;
omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
- omap2xxx_cm_wait_module_ready(PLL_MOD, 1, status_bit);
+ omap2xxx_cm_wait_module_ready(0, PLL_MOD, 1, status_bit);
/*
* REVISIT: Should we return an error code if
/**
* omap2xxx_cm_wait_module_ready - wait for a module to leave idle or standby
+ * @part: PRCM partition, ignored for OMAP2
* @prcm_mod: PRCM module offset
* @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
* @idlest_shift: shift of the bit in the CM_IDLEST* register to check
* (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon
* success or -EBUSY if the module doesn't enable in time.
*/
-int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
+ u8 idlest_shift)
{
int ena = 0, i = 0;
u8 cm_idlest_reg;
extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
-extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
- u8 idlest_shift);
+int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
+ u8 idlest_shift);
extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
s16 *prcm_inst, u8 *idlest_reg_id);
extern int omap2xxx_cm_fclks_active(void);
/**
* am33xx_cm_wait_module_ready - wait for a module to be in 'func' state
+ * @part: PRCM partition, ignored for AM33xx
* @inst: CM instance register offset (*_INST macro)
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
+ * @bit_shift: bit shift for the register, ignored for AM33xx
*
* Wait for the module IDLEST to be functional. If the idle state is in any
* the non functional state (trans, idle or disabled), module and thus the
* sysconfig cannot be accessed and will probably lead to an "imprecise
* external abort"
*/
-int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
+static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
+ u8 bit_shift)
{
int i = 0;
.clkdm_clk_disable = am33xx_clkdm_clk_disable,
};
-static struct cm_ll_data am33xx_cm_ll_data;
+static struct cm_ll_data am33xx_cm_ll_data = {
+ .wait_module_ready = &am33xx_cm_wait_module_ready,
+};
int __init am33xx_cm_init(void)
{
u16 clkctrl_offs);
extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
u16 clkctrl_offs);
-int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs);
#else
static inline int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
{
u16 clkctrl_offs)
{
}
-
-static inline int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
-{
- return 0;
-}
#endif
#endif /* ASSEMBLER */
/**
* omap3xxx_cm_wait_module_ready - wait for a module to leave idle or standby
+ * @part: PRCM partition, ignored for OMAP3
* @prcm_mod: PRCM module offset
* @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
* @idlest_shift: shift of the bit in the CM_IDLEST* register to check
* (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon
* success or -EBUSY if the module doesn't enable in time.
*/
-int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+static int omap3xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
+ u8 idlest_shift)
{
int ena = 0, i = 0;
u8 cm_idlest_reg;
extern void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask);
extern bool omap3xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
-extern int omap3xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
- u8 idlest_shift);
extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
s16 *prcm_inst, u8 *idlest_reg_id);
}
/**
- * cm_wait_module_ready - wait for a module to leave idle or standby
+ * omap_cm_wait_module_ready - wait for a module to leave idle or standby
+ * @part: PRCM partition
* @prcm_mod: PRCM module offset
- * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
+ * @idlest_reg: CM_IDLESTx register
* @idlest_shift: shift of the bit in the CM_IDLEST* register to check
*
* Wait for the PRCM to indicate that the module identified by
* no per-SoC wait_module_ready() function pointer has been registered
* or if the idlest register is unknown on the SoC.
*/
-int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
+ u8 idlest_shift)
{
if (!cm_ll_data->wait_module_ready) {
WARN_ONCE(1, "cm: %s: no low-level function defined\n",
return -EINVAL;
}
- return cm_ll_data->wait_module_ready(prcm_mod, idlest_id, idlest_shift);
+ return cm_ll_data->wait_module_ready(part, prcm_mod, idlest_reg,
+ idlest_shift);
}
/**
* @part: PRCM partition ID that the CM_CLKCTRL register exists in
* @inst: CM instance register offset (*_INST macro)
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
+ * @bit_shift: bit shift for the register, ignored for OMAP4+
*
* Wait for the module IDLEST to be functional. If the idle state is in any
* the non functional state (trans, idle or disabled), module and thus the
* sysconfig cannot be accessed and will probably lead to an "imprecise
* external abort"
*/
-int omap4_cminst_wait_module_ready(u8 part, u16 inst, u16 clkctrl_offs)
+static int omap4_cminst_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs,
+ u8 bit_shift)
{
int i = 0;
.clkdm_clk_disable = omap4_clkdm_clk_disable,
};
-static struct cm_ll_data omap4xxx_cm_ll_data;
+static struct cm_ll_data omap4xxx_cm_ll_data = {
+ .wait_module_ready = &omap4_cminst_wait_module_ready,
+};
int __init omap4_cm_init(void)
{
void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs);
void omap4_cminst_clkdm_force_sleep(u8 part, u16 inst, u16 cdoffs);
void omap4_cminst_clkdm_force_wakeup(u8 part, u16 inst, u16 cdoffs);
-int omap4_cminst_wait_module_ready(u8 part, u16 inst, u16 clkctrl_offs);
int omap4_cminst_wait_module_idle(u8 part, u16 inst, u16 clkctrl_offs);
extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs,
u16 clkctrl_offs);
/* XXX check module SIDLEMODE, hardreset status, enabled clocks */
- return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
- oh->prcm.omap2.idlest_reg_id,
- oh->prcm.omap2.idlest_idle_bit);
+ return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
+ oh->prcm.omap2.idlest_reg_id,
+ oh->prcm.omap2.idlest_idle_bit);
}
/**
/* XXX check module SIDLEMODE, hardreset status */
- return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
- oh->clkdm->cm_inst,
- oh->prcm.omap4.clkctrl_offs);
+ return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
+ oh->clkdm->cm_inst,
+ oh->prcm.omap4.clkctrl_offs, 0);
}
/**
/* XXX check module SIDLEMODE, hardreset status */
- return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
- oh->prcm.omap4.clkctrl_offs);
+ return omap_cm_wait_module_ready(0, oh->clkdm->cm_inst,
+ oh->prcm.omap4.clkctrl_offs, 0);
}
/**