dts: vt8500: Fix errors in SDHC node for WM8505

According to datasheet, the registers space of SDHC controller is 1Kb,
not '0x1000', the correct value should be '0x400'. Bracket interrupt
numbers individually per recommendations.

Signed-off-by: Roman Volkov <rvolkov@v1ros.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/boot/dts/wm8505.dtsi b/arch/arm/boot/dts/wm8505.dtsi
index a1a854b8a4547c1d47d8707c262335f7cdf66acd..e9ef539e13d318378dde5803c7e7e00c5f18865f 100644 (file)
--- a/arch/arm/boot/dts/wm8505.dtsi
+++ b/arch/arm/boot/dts/wm8505.dtsi
@@ -281,8 +281,8 @@
 
                sdhc@d800a000 {
                        compatible = "wm,wm8505-sdhc";
-                       reg = <0xd800a000 0x1000>;
-                       interrupts = <20 21>;
+                       reg = <0xd800a000 0x400>;
+                       interrupts = <20>, <21>;
                        clocks = <&clksdhc>;
                        bus-width = <4>;
                };