mt7601u: wait for clear rxq when stopping mac

mt7601u_mac_stop_hw should stop polling the rxq once it remains empty
but instead continues polling after the rxq status stays clear; bringing
down the interface takes about six seconds from this alone.

Speed up path by exiting rxq loop once status repeatedly polls empty.

Signed-off-by: Anthony Romano <anthony.romano@coreos.com>
Reviewed-by: Jakub Kicinski <kubakici@wp.pl>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>

diff --git a/drivers/net/wireless/mediatek/mt7601u/init.c b/drivers/net/wireless/mediatek/mt7601u/init.c
index 44d46e25db80ba6bd4aa70d387d1de404f2559c4..a6e9017662269ee06b0d6f1be0d039f83542dbf5 100644 (file)
--- a/drivers/net/wireless/mediatek/mt7601u/init.c
+++ b/drivers/net/wireless/mediatek/mt7601u/init.c
@@ -293,13 +293,13 @@ static void mt7601u_mac_stop_hw(struct mt7601u_dev *dev)
        ok = 0;
        i = 200;
        while (i--) {
-               if ((mt76_rr(dev, 0x0430) & 0x00ff0000) ||
-                   (mt76_rr(dev, 0x0a30) & 0xffffffff) ||
-                   (mt76_rr(dev, 0x0a34) & 0xffffffff))
-                       ok++;
-               if (ok > 6)
-                       break;
-
+               if (!(mt76_rr(dev, MT_RXQ_STA) & 0x00ff0000) &&
+                   !mt76_rr(dev, 0x0a30) &&
+                   !mt76_rr(dev, 0x0a34)) {
+                       if (ok++ > 5)
+                               break;
+                       continue;
+               }
                msleep(1);
        }
 

diff --git a/drivers/net/wireless/mediatek/mt7601u/regs.h b/drivers/net/wireless/mediatek/mt7601u/regs.h
index 27a429d90cec02f6cdaec64194ccca7f9ea1bd28..2a8837002f0070a965c0f23b0209f4e7b78617af 100644 (file)
--- a/drivers/net/wireless/mediatek/mt7601u/regs.h
+++ b/drivers/net/wireless/mediatek/mt7601u/regs.h
@@ -192,6 +192,9 @@
 #define MT_BCN_OFFSET_BASE             0x041c
 #define MT_BCN_OFFSET(_n)              (MT_BCN_OFFSET_BASE + ((_n) << 2))
 
+#define MT_RXQ_STA                     0x0430
+#define MT_TXQ_STA                     0x0434
+
 #define        MT_RF_CSR_CFG                   0x0500
 #define MT_RF_CSR_CFG_DATA             GENMASK(7, 0)
 #define MT_RF_CSR_CFG_REG_ID           GENMASK(13, 8)