struct regulator_bulk_data supplies[CS53L30_NUM_SUPPLIES];
struct regmap *regmap;
struct gpio_desc *reset_gpio;
+ struct gpio_desc *mute_gpio;
struct clk *mclk;
bool use_sdout2;
u32 mclk_rate;
return 0;
}
+static int cs53l30_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
+{
+ struct cs53l30_private *priv = snd_soc_codec_get_drvdata(dai->codec);
+
+ if (priv->mute_gpio)
+ gpiod_set_value_cansleep(priv->mute_gpio, mute);
+
+ return 0;
+}
+
/* SNDRV_PCM_RATE_KNOT -> 12000, 24000 Hz, limit with constraint list */
#define CS53L30_RATES (SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_KNOT)
.set_sysclk = cs53l30_set_sysclk,
.set_tristate = cs53l30_set_tristate,
.set_tdm_slot = cs53l30_set_dai_tdm_slot,
+ .mute_stream = cs53l30_mute_stream,
};
static struct snd_soc_dai_driver cs53l30_dai = {
cs53l30->mclk = NULL;
}
+ /* Fetch the MUTE control */
+ cs53l30->mute_gpio = devm_gpiod_get_optional(dev, "mute",
+ GPIOD_OUT_HIGH);
+ if (IS_ERR(cs53l30->mute_gpio)) {
+ ret = PTR_ERR(cs53l30->mute_gpio);
+ goto error;
+ }
+
+ if (cs53l30->mute_gpio) {
+ /* Enable MUTE controls via MUTE pin */
+ regmap_write(cs53l30->regmap, CS53L30_MUTEP_CTL1,
+ CS53L30_MUTEP_CTL1_MUTEALL);
+ /* Flip the polarity of MUTE pin */
+ if (gpiod_is_active_low(cs53l30->mute_gpio))
+ regmap_update_bits(cs53l30->regmap, CS53L30_MUTEP_CTL2,
+ CS53L30_MUTE_PIN_POLARITY, 0);
+ }
+
if (!of_property_read_u8(np, "cirrus,micbias-lvl", &val))
regmap_update_bits(cs53l30->regmap, CS53L30_MICBIAS_CTL,
CS53L30_MIC_BIAS_CTRL_MASK, val);