]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
ARM: SAMSUNG: remove struct 's3c24xx_uart_clksrc' and all uses of it
authorThomas Abraham <thomas.abraham@linaro.org>
Mon, 24 Oct 2011 09:47:51 +0000 (11:47 +0200)
committerKukjin Kim <kgene.kim@samsung.com>
Thu, 3 Nov 2011 02:08:45 +0000 (11:08 +0900)
With clkdev based clock lookup added to samsung serial driver, the use
of 'struct s3c24xx_uart_clksrc' to supply clock names in platform
data is removed from all the Samsung platform code.

Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Ramax Lo <ramaxlo@gmail.com>
Cc: Vasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
12 files changed:
arch/arm/mach-exynos4/init.c
arch/arm/mach-s3c2410/mach-bast.c
arch/arm/mach-s3c2410/mach-vr1000.c
arch/arm/mach-s3c2440/mach-anubis.c
arch/arm/mach-s3c2440/mach-at2440evb.c
arch/arm/mach-s3c2440/mach-osiris.c
arch/arm/mach-s3c2440/mach-rx1950.c
arch/arm/mach-s3c2440/mach-rx3715.c
arch/arm/mach-s5p64x0/init.c
arch/arm/mach-s5pv210/init.c
arch/arm/plat-samsung/include/plat/regs-serial.h
drivers/tty/serial/samsung.h

index a8a83e3881a4e9442a15a06a46210355e65ddebd..e836c9cdc200ff3a60528bf1f371dbe08bcec872 100644 (file)
 #include <plat/devs.h>
 #include <plat/regs-serial.h>
 
-static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
-       [0] = {
-               .name           = "uclk1",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       },
-};
-
 /* uart registration process */
 void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
@@ -30,11 +21,7 @@ void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
        u32 ucnt;
 
        for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
-               if (!tcfg->clocks) {
-                       tcfg->has_fracval = 1;
-                       tcfg->clocks = exynos4_serial_clocks;
-                       tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
-               }
+               tcfg->has_fracval = 1;
                tcfg->flags |= NO_NEED_CHECK_CLKSRC;
        }
 
index a20ae1ad406217d3ae7699f0d9ba25dc01941515..71b955877793a8d6873eaf4c348036f8cb3e32ad 100644 (file)
@@ -164,22 +164,6 @@ static struct map_desc bast_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 
-static struct s3c24xx_uart_clksrc bast_serial_clocks[] = {
-       [0] = {
-               .name           = "uclk",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       },
-       [1] = {
-               .name           = "pclk",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       }
-};
-
-
 static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
@@ -187,8 +171,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = bast_serial_clocks,
-               .clocks_size = ARRAY_SIZE(bast_serial_clocks),
        },
        [1] = {
                .hwport      = 1,
@@ -196,8 +178,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = bast_serial_clocks,
-               .clocks_size = ARRAY_SIZE(bast_serial_clocks),
        },
        /* port 2 is not actually used */
        [2] = {
@@ -206,8 +186,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = bast_serial_clocks,
-               .clocks_size = ARRAY_SIZE(bast_serial_clocks),
        }
 };
 
index df47e8e900659a3b85501938e98fb902e10808cf..0f0a9a1795e9c2e29e5fe538de1ce3ca2fdc4864 100644 (file)
@@ -109,23 +109,6 @@ static struct map_desc vr1000_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 
-/* uart clock source(s) */
-
-static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
-       [0] = {
-               .name           = "uclk",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       },
-       [1] = {
-               .name           = "pclk",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0.
-       }
-};
-
 static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
@@ -133,8 +116,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = vr1000_serial_clocks,
-               .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
        },
        [1] = {
                .hwport      = 1,
@@ -142,8 +123,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = vr1000_serial_clocks,
-               .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
        },
        /* port 2 is not actually used */
        [2] = {
@@ -152,9 +131,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = vr1000_serial_clocks,
-               .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
-
        }
 };
 
index 74f92fc3fd041ed3a110cb1e9226966190a90d27..d8f36c0a16ad9ebf935223f3bd6f43e4f93fe3c3 100644 (file)
@@ -96,22 +96,6 @@ static struct map_desc anubis_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 
-static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = {
-       [0] = {
-               .name           = "uclk",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       },
-       [1] = {
-               .name           = "pclk",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       }
-};
-
-
 static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
@@ -119,8 +103,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = anubis_serial_clocks,
-               .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
+               .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
        },
        [1] = {
                .hwport      = 2,
@@ -128,8 +111,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = anubis_serial_clocks,
-               .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
+               .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
        },
 };
 
index 38887ee0c784587015b53c8da0712800c3ae3fbb..aa86ca8fa1e9d5cdbcb1b88f74ff22c988bfd350 100644 (file)
@@ -57,22 +57,6 @@ static struct map_desc at2440evb_iodesc[] __initdata = {
 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
 
-static struct s3c24xx_uart_clksrc at2440evb_serial_clocks[] = {
-       [0] = {
-               .name           = "uclk",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       },
-       [1] = {
-               .name           = "pclk",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       }
-};
-
-
 static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
@@ -80,8 +64,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = at2440evb_serial_clocks,
-               .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
+               .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
        },
        [1] = {
                .hwport      = 1,
@@ -89,8 +72,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = at2440evb_serial_clocks,
-               .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
+               .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
        },
 };
 
index dc142ebf8cbae643f3f9d685e91882f749d6ed1f..d7e47b2b6ec9710518662cfba81d4684989787dc 100644 (file)
@@ -100,21 +100,6 @@ static struct map_desc osiris_iodesc[] __initdata = {
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 
-static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
-       [0] = {
-               .name           = "uclk",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       },
-       [1] = {
-               .name           = "pclk",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       }
-};
-
 static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
        [0] = {
                .hwport      = 0,
@@ -122,8 +107,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = osiris_serial_clocks,
-               .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
+               .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
        },
        [1] = {
                .hwport      = 1,
@@ -131,8 +115,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = osiris_serial_clocks,
-               .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
+               .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
        },
        [2] = {
                .hwport      = 2,
@@ -140,8 +123,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
                .ucon        = UCON,
                .ulcon       = ULCON,
                .ufcon       = UFCON,
-               .clocks      = osiris_serial_clocks,
-               .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
+               .clk_sel        = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
        }
 };
 
index 094c4bff7fe4ab94d9be9c0a878a84180bd56270..4267cd56bfe720d7e3d7a5eeeaa48fab653ab21d 100644 (file)
 static struct map_desc rx1950_iodesc[] __initdata = {
 };
 
-static struct s3c24xx_uart_clksrc rx1950_serial_clocks[] = {
-       [0] = {
-              .name = "fclk_n",
-              .divisor = 1,
-              .min_baud = 0,
-              .max_baud = 0,
-       },
-};
-
 static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
        [0] = {
               .hwport = 0,
@@ -84,8 +75,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
               .ucon = 0x3c5,
               .ulcon = 0x03,
               .ufcon = 0x51,
-              .clocks = rx1950_serial_clocks,
-              .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
+               .clk_sel = S3C2410_UCON_CLKSEL3,
        },
        [1] = {
               .hwport = 1,
@@ -93,8 +83,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
               .ucon = 0x3c5,
               .ulcon = 0x03,
               .ufcon = 0x51,
-              .clocks = rx1950_serial_clocks,
-              .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
+               .clk_sel = S3C2410_UCON_CLKSEL3,
        },
        /* IR port */
        [2] = {
@@ -103,8 +92,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
               .ucon = 0x3c5,
               .ulcon = 0x43,
               .ufcon = 0xf1,
-              .clocks = rx1950_serial_clocks,
-              .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
+               .clk_sel = S3C2410_UCON_CLKSEL3,
        },
 };
 
index f934f5b88a4ab2f96d4847e9e184c8240afbcc3f..3d5e2e67971ed3a9709d3bbfd5385d7fd597c16b 100644 (file)
@@ -67,16 +67,6 @@ static struct map_desc rx3715_iodesc[] __initdata = {
        },
 };
 
-
-static struct s3c24xx_uart_clksrc rx3715_serial_clocks[] = {
-       [0] = {
-               .name           = "fclk_n",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       }
-};
-
 static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
        [0] = {
                .hwport      = 0,
@@ -84,8 +74,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
                .ucon        = 0x3c5,
                .ulcon       = 0x03,
                .ufcon       = 0x51,
-               .clocks      = rx3715_serial_clocks,
-               .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
+               .clk_sel        = S3C2410_UCON_CLKSEL3,
        },
        [1] = {
                .hwport      = 1,
@@ -93,8 +82,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
                .ucon        = 0x3c5,
                .ulcon       = 0x03,
                .ufcon       = 0x00,
-               .clocks      = rx3715_serial_clocks,
-               .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
+               .clk_sel        = S3C2410_UCON_CLKSEL3,
        },
        /* IR port */
        [2] = {
@@ -103,8 +91,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
                .ucon        = 0x3c5,
                .ulcon       = 0x43,
                .ufcon       = 0x51,
-               .clocks      = rx3715_serial_clocks,
-               .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
+               .clk_sel        = S3C2410_UCON_CLKSEL3,
        }
 };
 
index 79833caf816560404fe1190c8235ed3ae1da7c10..659a66c131a141e3378d1f2a64ada2ca21a0aecd 100644 (file)
 #include <plat/s5p6450.h>
 #include <plat/regs-serial.h>
 
-static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = {
-       [0] = {
-               .name           = "pclk_low",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       },
-       [1] = {
-               .name           = "uclk1",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       },
-};
-
 /* uart registration process */
-
-void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-       struct s3c2410_uartcfg *tcfg = cfg;
-       u32 ucnt;
-
-       for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
-               if (!tcfg->clocks) {
-                       tcfg->clocks = s5p64x0_serial_clocks;
-                       tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks);
-               }
-       }
-}
-
 void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
        int uart;
@@ -62,12 +33,10 @@ void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
                s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
        }
 
-       s5p64x0_common_init_uarts(cfg, no);
        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
 }
 
 void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
-       s5p64x0_common_init_uarts(cfg, no);
        s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
 }
index 4865ae2c475a685c0626b6e1e03537052446906f..468a5f88619329c7b727ce38dfc68b4c6762983d 100644 (file)
 #include <plat/s5pv210.h>
 #include <plat/regs-serial.h>
 
-static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
-       [0] = {
-               .name           = "pclk",
-               .divisor        = 1,
-               .min_baud       = 0,
-               .max_baud       = 0,
-       },
-};
-
 /* uart registration process */
 void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
 {
-       struct s3c2410_uartcfg *tcfg = cfg;
-       u32 ucnt;
-
-       for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
-               if (!tcfg->clocks) {
-                       tcfg->clocks = s5pv210_serial_clocks;
-                       tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
-               }
-       }
-
        s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
 }
index b493d8d0cc0c74047cc04696eebcb9e637addf18..25f0c364f61ad6764474289076fe91fc051bb074 100644 (file)
 
 #ifndef __ASSEMBLY__
 
-/* struct s3c24xx_uart_clksrc
- *
- * this structure defines a named clock source that can be used for the
- * uart, so that the best clock can be selected for the requested baud
- * rate.
- *
- * min_baud and max_baud define the range of baud-rates this clock is
- * acceptable for, if they are both zero, it is assumed any baud rate that
- * can be generated from this clock will be used.
- *
- * divisor gives the divisor from the clock to the one seen by the uart
-*/
-
-struct s3c24xx_uart_clksrc {
-       const char      *name;
-       unsigned int     divisor;
-       unsigned int     min_baud;
-       unsigned int     max_baud;
-};
-
 /* configuration structure for per-machine configurations for the
  * serial port
  *
@@ -268,9 +248,6 @@ struct s3c2410_uartcfg {
        unsigned long      ucon;         /* value of ucon for port */
        unsigned long      ulcon;        /* value of ulcon for port */
        unsigned long      ufcon;        /* value of ufcon for port */
-
-       struct s3c24xx_uart_clksrc *clocks;
-       unsigned int                clocks_size;
 };
 
 /* s3c24xx_uart_devs
index 11369f3102c19a0bb70767ee1cd632c5e67403d2..40e9ef19bd12737e541260bc6d6137aa0119197d 100644 (file)
@@ -47,7 +47,6 @@ struct s3c24xx_uart_port {
        unsigned int                    tx_irq;
 
        struct s3c24xx_uart_info        *info;
-       struct s3c24xx_uart_clksrc      *clksrc;
        struct clk                      *clk;
        struct clk                      *baudclk;
        struct uart_port                port;