ARM: S5P6442: Add DMA operation clock

This patch adds DMA operation clock which is disabled as default.

Signed-off-by: Seungwhan Youn <sw.youn@samsung.com>
Acked-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/mach-s5p6442/clock.c b/arch/arm/mach-s5p6442/clock.c
index dcd20f17212a551c52abb165f95b3cb92722493a..16d6e7e61b50a964432c5a405829eab99d7b9b43 100644 (file)
--- a/arch/arm/mach-s5p6442/clock.c
+++ b/arch/arm/mach-s5p6442/clock.c
@@ -192,6 +192,11 @@ static struct clk clk_pclkd1 = {
        .parent         = &clk_hclkd1,
 };
 
+int s5p6442_clk_ip0_ctrl(struct clk *clk, int enable)
+{
+       return s5p_gatectrl(S5P_CLKGATE_IP0, clk, enable);
+}
+
 int s5p6442_clk_ip3_ctrl(struct clk *clk, int enable)
 {
        return s5p_gatectrl(S5P_CLKGATE_IP3, clk, enable);
@@ -335,6 +340,16 @@ void __init_or_cpufreq s5p6442_setup_clocks(void)
        clk_pclkd1.rate = pclkd1;
 }
 
+static struct clk init_clocks_disable[] = {
+       {
+               .name           = "pdma",
+               .id             = -1,
+               .parent         = &clk_pclkd1,
+               .enable         = s5p6442_clk_ip0_ctrl,
+               .ctrlbit        = (1 << 3),
+       },
+};
+
 static struct clk init_clocks[] = {
        {
                .name           = "systimer",
@@ -393,10 +408,23 @@ static struct clk *clks[] __initdata = {
 
 void __init s5p6442_register_clocks(void)
 {
+       struct clk *clkptr;
+       int i, ret;
+
        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
 
        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
+       clkptr = init_clocks_disable;
+       for (i = 0; i < ARRAY_SIZE(init_clocks_disable); i++, clkptr++) {
+               ret = s3c24xx_register_clock(clkptr);
+               if (ret < 0) {
+                       printk(KERN_ERR "Fail to register clock %s (%d)\n",
+                                       clkptr->name, ret);
+               } else
+                       (clkptr->enable)(clkptr, 0);
+       }
+
        s3c_pwmclk_init();
 }

diff --git a/arch/arm/mach-s5p6442/include/mach/regs-clock.h b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
index d8360b5d4ecea471263538c23dbc54520c2e57f1..00828a33699133514242931ba7634c81a6877ba7 100644 (file)
--- a/arch/arm/mach-s5p6442/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5p6442/include/mach/regs-clock.h
@@ -46,6 +46,7 @@
 #define S5P_CLK_DIV5           S5P_CLKREG(0x314)
 #define S5P_CLK_DIV6           S5P_CLKREG(0x318)
 
+#define S5P_CLKGATE_IP0                S5P_CLKREG(0x460)
 #define S5P_CLKGATE_IP3                S5P_CLKREG(0x46C)
 
 /* CLK_OUT */