Merge remote-tracking branch 'cortex/for-next'

Conflicts:
	arch/arm/include/asm/cputype.h

diff --cc arch/arm/Kconfig
index 8f7cbdd6f180ce1fb923f385f56956e639000afd,e04c7793f47e2dda1360c517e1fe46c5c4647a2e..0eb2c9b46053bab53552f596cde13ad89707b28e
--- 1/arch/arm/Kconfig
--- 2/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@@ -1656,12 -1655,10 +1656,13 @@@ config H
        default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
        default 100
  
 +config SCHED_HRTICK
 +      def_bool HIGH_RES_TIMERS
 +
  config THUMB2_KERNEL
-       bool "Compile the kernel in Thumb-2 mode"
+       bool "Compile the kernel in Thumb-2 mode" if !CPU_THUMBONLY
        depends on CPU_V7 && !CPU_V6 && !CPU_V6K
+       default y if CPU_THUMBONLY
        select AEABI
        select ARM_ASM_UNIFIED
        select ARM_UNWIND

diff --cc arch/arm/include/asm/cputype.h
index ad41ec2471e87e7ac5cdf71839b764532e116d06,574269ed2232d0315f84a4fcebaa8c68f2a59a6b..30243c09141a128bd6ce280d5eedae7ed6c3341a
--- 1/arch/arm/include/asm/cputype.h
--- 2/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@@ -59,29 -60,24 +60,42 @@@ extern unsigned int processor_id
                    : "cc");                                            \
                __val;                                                  \
        })
- #else
- #define read_cpuid(reg) (processor_id)
- #define read_cpuid_ext(reg) 0
- #endif
+ 
+ #else /* ifdef CONFIG_CPU_CP15 */
+ 
+ /*
+  * read_cpuid and read_cpuid_ext should only ever be called on machines that
+  * have cp15 so warn on other usages.
+  */
+ #define read_cpuid(reg)                                                       \
+       ({                                                              \
+               WARN_ON_ONCE(1);                                        \
+               0;                                                      \
+       })
+ 
+ #define read_cpuid_ext(reg) read_cpuid(reg)
+ 
+ #endif /* ifdef CONFIG_CPU_CP15 / else */
  
 +#define ARM_CPU_IMP_ARM                       0x41
 +#define ARM_CPU_IMP_INTEL             0x69
 +
 +#define ARM_CPU_PART_ARM1136          0xB360
 +#define ARM_CPU_PART_ARM1156          0xB560
 +#define ARM_CPU_PART_ARM1176          0xB760
 +#define ARM_CPU_PART_ARM11MPCORE      0xB020
 +#define ARM_CPU_PART_CORTEX_A8                0xC080
 +#define ARM_CPU_PART_CORTEX_A9                0xC090
 +#define ARM_CPU_PART_CORTEX_A5                0xC050
 +#define ARM_CPU_PART_CORTEX_A15               0xC0F0
 +#define ARM_CPU_PART_CORTEX_A7                0xC070
 +
 +#define ARM_CPU_XSCALE_ARCH_MASK      0xe000
 +#define ARM_CPU_XSCALE_ARCH_V1                0x2000
 +#define ARM_CPU_XSCALE_ARCH_V2                0x4000
 +#define ARM_CPU_XSCALE_ARCH_V3                0x6000
 +
+ #ifdef CONFIG_CPU_CP15
  /*
   * The CPU ID never changes at run time, so we might as well tell the
   * compiler that it's constant.  Use this function to read the CPU ID
@@@ -92,21 -88,15 +106,30 @@@ static inline unsigned int __attribute_
        return read_cpuid(CPUID_ID);
  }
  
+ #else /* ifdef CONFIG_CPU_CP15 */
+ 
+ static inline unsigned int __attribute_const__ read_cpuid_id(void)
+ {
+       return processor_id;
+ }
+ 
+ #endif /* ifdef CONFIG_CPU_CP15 / else */
+ 
 +static inline unsigned int __attribute_const__ read_cpuid_implementor(void)
 +{
 +      return (read_cpuid_id() & 0xFF000000) >> 24;
 +}
 +
 +static inline unsigned int __attribute_const__ read_cpuid_part_number(void)
 +{
 +      return read_cpuid_id() & 0xFFF0;
 +}
 +
 +static inline unsigned int __attribute_const__ xscale_cpu_arch_version(void)
 +{
 +      return read_cpuid_part_number() & ARM_CPU_XSCALE_ARCH_MASK;
 +}
 +
  static inline unsigned int __attribute_const__ read_cpuid_cachetype(void)
  {
        return read_cpuid(CPUID_CACHETYPE);

diff --cc arch/arm/kernel/smp_scu.c
Simple merge

diff --cc arch/arm/mach-omap2/id.c
Simple merge

diff --cc arch/arm/mach-omap2/omap-smp.c
Simple merge

diff --cc arch/arm/mm/Kconfig
Simple merge

diff --cc arch/arm/mm/mmu.c
Simple merge