This patch sets HDMI PHY register values in MXC HDMI driver
platform data so that MXC HDMI driver can configure the
0x09 CKSYMTXCTRL register(Clock Symbol and Transmitter
Control Register) and 0x0E VLEVCTRL register(Voltage Level
Control Register), then we may pass HDMI compliance test
for MX6 HDMI dongle board.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit
788bcf52a2e4c37dc42e9605d31995f8dd80d674)
/*
- * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
.init = hdmi_init,
.enable_pins = hdmi_enable_ddc_pin,
.disable_pins = hdmi_disable_ddc_pin,
+ .phy_reg_vlev = 0x0294,
+ .phy_reg_cksymtx = 0x800d,
};
static struct fsl_mxc_hdmi_core_platform_data hdmi_core_data = {