Define this register and it's bits so that we can possibly support
it.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
#define S526_TIMER_MANUAL S526_TIMER_MODE(0)
#define S526_TIMER_AUTO S526_TIMER_MODE(1)
#define S526_TIMER_RESTART BIT(0)
-#define REG_WDC 0x02
+#define S526_WDOG_REG 0x02
+#define S526_WDOG_INVERTED BIT(4)
+#define S526_WDOG_ENA BIT(3)
+#define S526_WDOG_INTERVAL(x) (((x) & 0x7) << 0)
#define REG_DAC 0x04
#define REG_ADC 0x06
#define REG_ADD 0x08