Merge tag 'arm-soc/for-4.7/devicetree-arm64' of http://github.com/Broadcom/stblinux...

Pull "Broadcom ARM64-based SoC Device Tree changes" from Florian Fainelli:

- Anup enables a bunch of standard peripherals in the Northstar 2 DTS: PL330
  DMA, GIC maintenance interrupt, PL022 SPI controller

- Anup also re-orgnanizes the clock Device Tree fragments into a separate file
  for consistency with how other Broadcom SoCs are doing this

- Luke switches the SMP enable-method and reboot from a spin-table + syscon to
  the standard PSCI 1.0 firmware interface

* tag 'arm-soc/for-4.7/devicetree-arm64' of http://github.com/Broadcom/stblinux:
  arm64: dts: NS2 secondary core enablement via PSCI
  arm64: dts: Add ARM PL022 SPI DT nodes for NS2
  arm64: dts: Move NS2 clock DT nodes to separate DT file
  arm64: dts: Add maintenance interrupt for GIC in NS2 DT
  arm64: dts: Add ARM PL330 DMA DT node for NS2