arch/tile: use a cleaner technique to enable interrupt for cpu_idle()

Previously we used iret to atomically return to kernel PL with
interrupts enabled.  However, it turns out that we are architecturally
guaranteed that we can just set and clear the "interrupt critical
section" and only interrupt on the following instruction, so we
now do that instead, since it's cleaner.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>

diff --git a/arch/tile/kernel/entry.S b/arch/tile/kernel/entry.S
index c3aa0676ed067955848be553b54f6ef53f8816c4..431e9ae60488c73f29c35761170150e7f65a7a92 100644 (file)
--- a/arch/tile/kernel/entry.S
+++ b/arch/tile/kernel/entry.S
@@ -91,23 +91,17 @@ STD_ENTRY(smp_nap)
 
 /*
  * Enable interrupts racelessly and then nap until interrupted.
+ * Architecturally, we are guaranteed that enabling interrupts via
+ * mtspr to INTERRUPT_CRITICAL_SECTION only interrupts at the next PC.
  * This function's _cpu_idle_nap address is special; see intvec.S.
  * When interrupted at _cpu_idle_nap, we bump the PC forward 8, and
  * as a result return to the function that called _cpu_idle().
  */
 STD_ENTRY(_cpu_idle)
-       {
-        lnk r0
-        movei r1, KERNEL_PL
-       }
-       {
-        addli r0, r0, _cpu_idle_nap - .
-        mtspr INTERRUPT_CRITICAL_SECTION, r1
-       }
+       movei r1, 1
+       mtspr INTERRUPT_CRITICAL_SECTION, r1
        IRQ_ENABLE(r2, r3)             /* unmask, but still with ICS set */
-       mtspr SPR_EX_CONTEXT_K_1, r1   /* Kernel PL, ICS clear */
-       mtspr SPR_EX_CONTEXT_K_0, r0
-       iret
+       mtspr INTERRUPT_CRITICAL_SECTION, zero
        .global _cpu_idle_nap
 _cpu_idle_nap:
        nap