drm/radeon: Maintain prime import/export refcount for BOs

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 2e400dc414e378eed907b55069d20ac7ae6868e9..c1c8e2208a21b4fd045d309249051dd391a14ec1 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -499,6 +499,7 @@ struct radeon_bo {
        u32                             tiling_flags;
        u32                             pitch;
        int                             surface_reg;
+       unsigned                        prime_shared_count;
        /* list of all virtual address to which this bo
         * is associated to
         */

diff --git a/drivers/gpu/drm/radeon/radeon_prime.c b/drivers/gpu/drm/radeon/radeon_prime.c
index f3609c97496b2f56bf35cfbe2cf52f76b30b9f79..7110d403322c495dc27d515396f0dc02ecaaa331 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_prime.c
+++ b/drivers/gpu/drm/radeon/radeon_prime.c
@@ -77,6 +77,7 @@ struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
        list_add_tail(&bo->list, &rdev->gem.objects);
        mutex_unlock(&rdev->gem.mutex);
 
+       bo->prime_shared_count = 1;
        return &bo->gem_base;
 }
 
@@ -91,6 +92,9 @@ int radeon_gem_prime_pin(struct drm_gem_object *obj)
 
        /* pin buffer into GTT */
        ret = radeon_bo_pin(bo, RADEON_GEM_DOMAIN_GTT, NULL);
+       if (likely(ret == 0))
+               bo->prime_shared_count++;
+
        radeon_bo_unreserve(bo);
        return ret;
 }
@@ -105,6 +109,8 @@ void radeon_gem_prime_unpin(struct drm_gem_object *obj)
                return;
 
        radeon_bo_unpin(bo);
+       if (bo->prime_shared_count)
+               bo->prime_shared_count--;
        radeon_bo_unreserve(bo);
 }