ARM: dts: imx6qdl-sabrelite: use MX6QDL_ENET_PINGRP_RGMII_MD

This saves some lines, but should not be a functional change.
Also, apply same change to imx6qdl-nitrogen6x.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index d7691c06cf5e0402bd2f1c4f35be5553cc86bfdb..34145d1fcf84c78fce32b31b0f02cac7f0cdd277 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -208,21 +208,7 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
-                               MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
-                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_ENET_PINGRP_RGMII_MD(0x1b0b0, 0x100b0)
                                /* Phy reset */
                                MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x000b0
                        >;

diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index 5b65f7906fd35e31024a560fa6f5268ebf68e54d..9a6f731c12df8ce46ee70efb9ebea9abd6a34204 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -207,21 +207,7 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
-                               MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
-                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_ENET_PINGRP_RGMII_MD(0x1b0b0, 0x100b0)
                                /* Phy reset */
                                MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x000b0
                        >;